To date, it is common in a semiconductor device such as a power IC that an ESD protection element connected to an input terminal and protecting the semiconductor device from surge voltage is disposed adjacent to a wire bonded pad electrode.
Also, to date, a semiconductor device wherein an ESD protection element is disposed under a pad electrode in order to reduce the chip area has also been developed. Next, a description will be given of one example of a heretofore known semiconductor device wherein an ESD protection element is disposed under a pad electrode.
FIG. 7 is a main portion sectional view of a semiconductor device having a heretofore known ESD protection diode 501. A main portion section in the vicinity of the ESD protection diode 501 is shown in FIG. 7. In FIG. 7, the ESD protection diode 501 of the semiconductor device 500 includes a p-type layer 52 disposed on a p-type semiconductor substrate 51, a LOCOS oxide film 53 disposed on the p-type layer 52, an n-type layer 54 disposed sandwiched by the LOCOS oxide film 53 on the p-type layer 52, and a p-type layer 55.
Also, the ESD protection diode 501 of the semiconductor device 500 includes a insulating film 56 disposed on the LOCOS oxide film 53 and n-type layer 54, contact holes 57 disposed in the insulating film 56 and LOCOS oxide film 53, and a pad electrode 58 disposed on the insulating film 56 on the n-type layer 54 and electrically connected via the contact holes 57 to the n-type layer 54. Also, the ESD protection diode 501 of the semiconductor device 500 includes a metal electrode 59 disposed distanced from the pad electrode 58 on the insulating film 56 and electrically connected to the p-type layer 55.
Also, the ESD protection diode 501 of the semiconductor device 500 includes a passivation film 60, opened above the pad electrode 58, disposed on the surfaces of the pad electrode 58 and metal electrode 59. The pad electrode 58 is the cathode electrode of the ESD protection diode 501, while the metal electrode 59 is the anode electrode. An unshown metal wire is connected to the anode electrode. A bonding wire 61 is fixed to the pad electrode 58. In FIG. 7, reference sign R indicates the operating resistance of the ESD protection diode 501, and for descriptive purposes is shown on the p-type semiconductor substrate 51.
FIG. 8 is a diagram showing the relationship between the voltage and current of the heretofore known ESD protection diode 501. In FIG. 8, the solid line indicates the relationship between the voltage and current of the ESD protection diode 501 when the area of the ESD protection diode 501 is in the region of, for example, 0.5 mm×0.5 mm. The dotted line indicates the relationship between the voltage and current of the ESD protection diode 501 when the area is in the region of, for example, 80 μm×80 μm. The current-voltage curve shown in FIG. 8 is such that the current starts at an avalanche voltage Vav of the ESD protection diode 501. The operating resistance is the reciprocal of the gradient (current÷voltage), and depends on the lateral resistance R when the p-type layer 52 and p-type semiconductor substrate 51 are combined (shown for descriptive purposes on the p-type semiconductor substrate 51 in FIG. 7).
The ESD protection diode 501 is such that, by increasing the gradient based on the current-voltage curve as indicated by the solid line in FIG. 8, it is possible to effectively clamp the surge voltage. By clamping the surge voltage, it is possible to protect an internal circuit (an element such as a MOSFET) of the semiconductor device 500 from the surge voltage.
Also, in PTL 1, there is a description of a semiconductor device wherein an ESD protection element formed of a lateral bipolar transistor is formed under a pad electrode. As the bipolar transistor has a lateral structure, the emitter electrode, base electrode, and collector electrode are formed in positions laterally distanced from one another, and the collector electrode is not of a structure that encloses the emitter electrode. Also, when the transistor operates, almost all the current flows laterally through a surface layer from the collector to the emitter.
Also, in PTL 2, it is described that a vertical bipolar transistor is used as an ESD protection element. Also, in PTL 3, a description is given of a diode wherein a insulating film is formed under a pad, stress when wire bonding is alleviated, and the leakage current is reduced.
Also, in PTL 4, a description is given of a semiconductor device wherein a protection diode is formed under a pad. Also, in PTL 5, it is described that a pad and protection element are integrated using an epitaxial substrate, and bonded metal wiring and wiring passing through a diode are connected to an internal circuit.